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<title>Static Call Graph - [STM32H750-tobudOS\STM32H750-tobudOS.axf]</title></head>
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<H1>Static Call Graph for image STM32H750-tobudOS\STM32H750-tobudOS.axf</H1><HR>
<BR><P>#&#060CALLGRAPH&#062# ARM Linker, 5060750: Last Updated: Sat Jan 06 17:21:22 2024
<BR><P>
<H3>Maximum Stack Usage =        368 bytes + Unknown(Functions without stacksize, Cycles, Untraceable Function Pointers)</H3><H3>
Call chain for Maximum Stack Depth:</H3>
main &rArr; MX_UART5_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
<P>
<H3>
Functions with no stack information
</H3><UL>
 <LI><a href="#[171]">port_int_disable</a>
 <LI><a href="#[172]">port_int_enable</a>
 <LI><a href="#[15d]">port_cpsr_save</a>
 <LI><a href="#[15c]">port_cpsr_restore</a>
 <LI><a href="#[15b]">port_clz</a>
 <LI><a href="#[11d]">port_sched_start</a>
 <LI><a href="#[117]">port_context_switch</a>
 <LI><a href="#[11b]">port_irq_context_switch</a>
 <LI><a href="#[8]">PendSV_Handler</a>
</UL>
</UL>
<P>
<H3>
Mutually Recursive functions
</H3> <LI><a href="#[2]">HardFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[2]">HardFault_Handler</a><BR>
 <LI><a href="#[82]">ADC3_IRQHandler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[82]">ADC3_IRQHandler</a><BR>
 <LI><a href="#[4]">BusFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[4]">BusFault_Handler</a><BR>
 <LI><a href="#[3]">MemManage_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[3]">MemManage_Handler</a><BR>
 <LI><a href="#[1]">NMI_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[1]">NMI_Handler</a><BR>
 <LI><a href="#[d3]">UART_EndTxTransfer</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[d3]">UART_EndTxTransfer</a><BR>
 <LI><a href="#[5]">UsageFault_Handler</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[5]">UsageFault_Handler</a><BR>
 <LI><a href="#[9e]">knl_idle_entry</a>&nbsp;&nbsp;&nbsp;&rArr;&nbsp;&nbsp;&nbsp;<a href="#[9e]">knl_idle_entry</a><BR>
</UL>
<P>
<H3>
Function Pointers
</H3><UL>
 <LI><a href="#[82]">ADC3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[1c]">ADC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[84]">BDMA_Channel0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[85]">BDMA_Channel1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[86]">BDMA_Channel2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[87]">BDMA_Channel3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[88]">BDMA_Channel4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[89]">BDMA_Channel5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[8a]">BDMA_Channel6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[8b]">BDMA_Channel7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[4]">BusFault_Handler</a> from stm32h7xx_it.o(i.BusFault_Handler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[63]">CEC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[8c]">COMP1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[92]">CRS_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[54]">CRYP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[53]">DCMI_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[73]">DFSDM1_FLT0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[74]">DFSDM1_FLT1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[75]">DFSDM1_FLT2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[76]">DFSDM1_FLT3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[15]">DMA1_Stream0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[16]">DMA1_Stream1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[17]">DMA1_Stream2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[18]">DMA1_Stream3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[19]">DMA1_Stream4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[1a]">DMA1_Stream5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[1b]">DMA1_Stream6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[38]">DMA1_Stream7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[5f]">DMA2D_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[41]">DMA2_Stream0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[42]">DMA2_Stream1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[43]">DMA2_Stream2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[44]">DMA2_Stream3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[45]">DMA2_Stream4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[49]">DMA2_Stream5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[4a]">DMA2_Stream6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[4b]">DMA2_Stream7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[6b]">DMAMUX1_OVR_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[83]">DMAMUX2_OVR_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[7]">DebugMon_Handler</a> from stm32h7xx_it.o(i.DebugMon_Handler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[93]">ECC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[46]">ETH_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[47]">ETH_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[10]">EXTI0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[32]">EXTI15_10_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[11]">EXTI1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[12]">EXTI2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[13]">EXTI3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[14]">EXTI4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[21]">EXTI9_5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[1d]">FDCAN1_IT0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[1f]">FDCAN1_IT1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[1e]">FDCAN2_IT0_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[20]">FDCAN2_IT1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[48]">FDCAN_CAL_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[e]">FLASH_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[39]">FMC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[56]">FPU_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[55]">HASH_RNG_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[72]">HRTIM1_FLT_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[6c]">HRTIM1_Master_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[6d]">HRTIM1_TIMA_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[6e]">HRTIM1_TIMB_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[6f]">HRTIM1_TIMC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[70]">HRTIM1_TIMD_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[71]">HRTIM1_TIME_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[81]">HSEM1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[2]">HardFault_Handler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[2a]">I2C1_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[29]">I2C1_EV_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[2c]">I2C2_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[2b]">I2C2_EV_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[4e]">I2C3_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[4d]">I2C3_EV_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[65]">I2C4_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[64]">I2C4_EV_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[7e]">JPEG_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[62]">LPTIM1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[8d]">LPTIM2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[8e]">LPTIM3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[8f]">LPTIM4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[90]">LPTIM5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[91]">LPUART1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[5e]">LTDC_ER_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[5d]">LTDC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[7d]">MDIOS_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[7c]">MDIOS_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[7f]">MDMA_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[3]">MemManage_Handler</a> from stm32h7xx_it.o(i.MemManage_Handler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[1]">NMI_Handler</a> from stm32h7xx_it.o(i.NMI_Handler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[68]">OTG_FS_EP1_IN_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[67]">OTG_FS_EP1_OUT_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[6a]">OTG_FS_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[69]">OTG_FS_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[50]">OTG_HS_EP1_IN_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[4f]">OTG_HS_EP1_OUT_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[52]">OTG_HS_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[51]">OTG_HS_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[b]">PVD_AVD_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[8]">PendSV_Handler</a> from port_s.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[61]">QUADSPI_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[f]">RCC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[33]">RTC_Alarm_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[d]">RTC_WKUP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[0]">Reset_Handler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[5c]">SAI1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[60]">SAI2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[77]">SAI3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[94]">SAI4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[3a]">SDMMC1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[80]">SDMMC2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[66]">SPDIF_RX_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[2d]">SPI1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[2e]">SPI2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[3c]">SPI3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[59]">SPI4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[5a]">SPI5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[5b]">SPI6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[6]">SVC_Handler</a> from stm32h7xx_it.o(i.SVC_Handler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[78]">SWPMI1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[9]">SysTick_Handler</a> from main.o(i.SysTick_Handler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[97]">SystemInit</a> from system_stm32h7xx.o(i.SystemInit) referenced from startup_stm32h750xx.o(.text)
 <LI><a href="#[c]">TAMP_STAMP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[79]">TIM15_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[7a]">TIM16_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[7b]">TIM17_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[22]">TIM1_BRK_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[25]">TIM1_CC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[24]">TIM1_TRG_COM_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[23]">TIM1_UP_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[26]">TIM2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[27]">TIM3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[28]">TIM4_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[3b]">TIM5_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[3f]">TIM6_DAC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[40]">TIM7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[34]">TIM8_BRK_TIM12_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[37]">TIM8_CC_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[36]">TIM8_TRG_COM_TIM14_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[35]">TIM8_UP_TIM13_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[3d]">UART4_IRQHandler</a> from modbus.o(i.UART4_IRQHandler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[3e]">UART5_IRQHandler</a> from stm32h7xx_it.o(i.UART5_IRQHandler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[57]">UART7_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[58]">UART8_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[99]">UART_DMAAbortOnError</a> from stm32h7xx_hal_uart.o(i.UART_DMAAbortOnError) referenced from stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler)
 <LI><a href="#[9c]">UART_DMAError</a> from stm32h7xx_hal_uart.o(i.UART_DMAError) referenced from stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA)
 <LI><a href="#[9a]">UART_DMAReceiveCplt</a> from stm32h7xx_hal_uart.o(i.UART_DMAReceiveCplt) referenced from stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA)
 <LI><a href="#[9b]">UART_DMARxHalfCplt</a> from stm32h7xx_hal_uart.o(i.UART_DMARxHalfCplt) referenced from stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA)
 <LI><a href="#[2f]">USART1_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[30]">USART2_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[31]">USART3_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[4c]">USART6_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[5]">UsageFault_Handler</a> from stm32h7xx_it.o(i.UsageFault_Handler) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[95]">WAKEUP_PIN_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[a]">WWDG_IRQHandler</a> from startup_stm32h750xx.o(.text) referenced from startup_stm32h750xx.o(RESET)
 <LI><a href="#[98]">__main</a> from entry.o(.ARM.Collect$$$$00000000) referenced from startup_stm32h750xx.o(.text)
 <LI><a href="#[a3]">agile_modbus_rtu_build_request_basis</a> from agile_modbus_rtu.o(i.agile_modbus_rtu_build_request_basis) referenced from agile_modbus_rtu.o(.constdata)
 <LI><a href="#[a4]">agile_modbus_rtu_build_response_basis</a> from agile_modbus_rtu.o(i.agile_modbus_rtu_build_response_basis) referenced from agile_modbus_rtu.o(.constdata)
 <LI><a href="#[a7]">agile_modbus_rtu_check_integrity</a> from agile_modbus_rtu.o(i.agile_modbus_rtu_check_integrity) referenced from agile_modbus_rtu.o(.constdata)
 <LI><a href="#[a8]">agile_modbus_rtu_pre_check_confirmation</a> from agile_modbus_rtu.o(i.agile_modbus_rtu_pre_check_confirmation) referenced from agile_modbus_rtu.o(.constdata)
 <LI><a href="#[a5]">agile_modbus_rtu_prepare_response_tid</a> from agile_modbus_rtu.o(i.agile_modbus_rtu_prepare_response_tid) referenced from agile_modbus_rtu.o(.constdata)
 <LI><a href="#[a6]">agile_modbus_rtu_send_msg_pre</a> from agile_modbus_rtu.o(i.agile_modbus_rtu_send_msg_pre) referenced from agile_modbus_rtu.o(.constdata)
 <LI><a href="#[a2]">agile_modbus_rtu_set_slave</a> from agile_modbus_rtu.o(i.agile_modbus_rtu_set_slave) referenced from agile_modbus_rtu.o(.constdata)
 <LI><a href="#[9d]">fputc</a> from main.o(i.fputc) referenced from printf8.o(i.__0printf$8)
 <LI><a href="#[9e]">knl_idle_entry</a> from tos_sys.o(i.knl_idle_entry) referenced from tos_sys.o(i.knl_idle_init)
 <LI><a href="#[9f]">led_thread_entry</a> from main.o(i.led_thread_entry) referenced from main.o(i.main)
 <LI><a href="#[96]">main</a> from main.o(i.main) referenced from entry9a.o(.ARM.Collect$$$$0000000B)
 <LI><a href="#[a0]">modbus_thread_entry</a> from modbus.o(i.modbus_thread_entry) referenced from modbus.o(i.modubs_init)
 <LI><a href="#[a1]">task_exit</a> from tos_task.o(i.task_exit) referenced from tos_task.o(i.tos_task_create)
</UL>
<P>
<H3>
Global Symbols
</H3>
<P><STRONG><a name="[98]"></a>__main</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry.o(.ARM.Collect$$$$00000000))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(.text)
</UL>
<P><STRONG><a name="[16b]"></a>_main_stk</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry2.o(.ARM.Collect$$$$00000001))

<P><STRONG><a name="[a9]"></a>_main_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Calls]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[b1]"></a>__main_after_scatterload</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry5.o(.ARM.Collect$$$$00000004))
<BR><BR>[Called By]<UL><LI><a href="#[aa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__scatterload
</UL>

<P><STRONG><a name="[16c]"></a>_main_clock</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry7b.o(.ARM.Collect$$$$00000008))

<P><STRONG><a name="[16d]"></a>_main_cpp_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry8b.o(.ARM.Collect$$$$0000000A))

<P><STRONG><a name="[16e]"></a>_main_init</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry9a.o(.ARM.Collect$$$$0000000B))

<P><STRONG><a name="[16f]"></a>__rt_final_cpp</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry10a.o(.ARM.Collect$$$$0000000D))

<P><STRONG><a name="[170]"></a>__rt_final_exit</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, entry11a.o(.ARM.Collect$$$$0000000F))

<P><STRONG><a name="[0]"></a>Reset_Handler</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[2]"></a>HardFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HardFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[82]"></a>ADC3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC3_IRQHandler
</UL>
<BR>[Called By]<UL><LI><a href="#[82]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;ADC3_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[1c]"></a>ADC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[84]"></a>BDMA_Channel0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[85]"></a>BDMA_Channel1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[86]"></a>BDMA_Channel2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[87]"></a>BDMA_Channel3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[88]"></a>BDMA_Channel4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[89]"></a>BDMA_Channel5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[8a]"></a>BDMA_Channel6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[8b]"></a>BDMA_Channel7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[63]"></a>CEC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[8c]"></a>COMP1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[92]"></a>CRS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[54]"></a>CRYP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[53]"></a>DCMI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[73]"></a>DFSDM1_FLT0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[74]"></a>DFSDM1_FLT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[75]"></a>DFSDM1_FLT2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[76]"></a>DFSDM1_FLT3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[15]"></a>DMA1_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[16]"></a>DMA1_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[17]"></a>DMA1_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[18]"></a>DMA1_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[19]"></a>DMA1_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[1a]"></a>DMA1_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[1b]"></a>DMA1_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[38]"></a>DMA1_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[5f]"></a>DMA2D_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[41]"></a>DMA2_Stream0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[42]"></a>DMA2_Stream1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[43]"></a>DMA2_Stream2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[44]"></a>DMA2_Stream3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[45]"></a>DMA2_Stream4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[49]"></a>DMA2_Stream5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[4a]"></a>DMA2_Stream6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[4b]"></a>DMA2_Stream7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[6b]"></a>DMAMUX1_OVR_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[83]"></a>DMAMUX2_OVR_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[93]"></a>ECC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[46]"></a>ETH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[47]"></a>ETH_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[10]"></a>EXTI0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[32]"></a>EXTI15_10_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[11]"></a>EXTI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[12]"></a>EXTI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[13]"></a>EXTI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[14]"></a>EXTI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[21]"></a>EXTI9_5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[1d]"></a>FDCAN1_IT0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[1f]"></a>FDCAN1_IT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[1e]"></a>FDCAN2_IT0_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[20]"></a>FDCAN2_IT1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[48]"></a>FDCAN_CAL_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[e]"></a>FLASH_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[39]"></a>FMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[56]"></a>FPU_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[55]"></a>HASH_RNG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[72]"></a>HRTIM1_FLT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[6c]"></a>HRTIM1_Master_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[6d]"></a>HRTIM1_TIMA_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[6e]"></a>HRTIM1_TIMB_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[6f]"></a>HRTIM1_TIMC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[70]"></a>HRTIM1_TIMD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[71]"></a>HRTIM1_TIME_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[81]"></a>HSEM1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[2a]"></a>I2C1_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[29]"></a>I2C1_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[2c]"></a>I2C2_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[2b]"></a>I2C2_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[4e]"></a>I2C3_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[4d]"></a>I2C3_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[65]"></a>I2C4_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[64]"></a>I2C4_EV_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[7e]"></a>JPEG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[62]"></a>LPTIM1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[8d]"></a>LPTIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[8e]"></a>LPTIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[8f]"></a>LPTIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[90]"></a>LPTIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[91]"></a>LPUART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[5e]"></a>LTDC_ER_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[5d]"></a>LTDC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[7d]"></a>MDIOS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[7c]"></a>MDIOS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[7f]"></a>MDMA_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[68]"></a>OTG_FS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[67]"></a>OTG_FS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[6a]"></a>OTG_FS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[69]"></a>OTG_FS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[50]"></a>OTG_HS_EP1_IN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[4f]"></a>OTG_HS_EP1_OUT_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[52]"></a>OTG_HS_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[51]"></a>OTG_HS_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[b]"></a>PVD_AVD_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[61]"></a>QUADSPI_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[f]"></a>RCC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[33]"></a>RTC_Alarm_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[d]"></a>RTC_WKUP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[5c]"></a>SAI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[60]"></a>SAI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[77]"></a>SAI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[94]"></a>SAI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[3a]"></a>SDMMC1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[80]"></a>SDMMC2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[66]"></a>SPDIF_RX_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[2d]"></a>SPI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[2e]"></a>SPI2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[3c]"></a>SPI3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[59]"></a>SPI4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[5a]"></a>SPI5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[5b]"></a>SPI6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[78]"></a>SWPMI1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[c]"></a>TAMP_STAMP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[79]"></a>TIM15_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[7a]"></a>TIM16_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[7b]"></a>TIM17_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[22]"></a>TIM1_BRK_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[25]"></a>TIM1_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[24]"></a>TIM1_TRG_COM_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[23]"></a>TIM1_UP_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[26]"></a>TIM2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[27]"></a>TIM3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[28]"></a>TIM4_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[3b]"></a>TIM5_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[3f]"></a>TIM6_DAC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[40]"></a>TIM7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[34]"></a>TIM8_BRK_TIM12_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[37]"></a>TIM8_CC_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[36]"></a>TIM8_TRG_COM_TIM14_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[35]"></a>TIM8_UP_TIM13_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[57]"></a>UART7_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[58]"></a>UART8_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[2f]"></a>USART1_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[30]"></a>USART2_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[31]"></a>USART3_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[4c]"></a>USART6_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[95]"></a>WAKEUP_PIN_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[a]"></a>WWDG_IRQHandler</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, startup_stm32h750xx.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[171]"></a>port_int_disable</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text), UNUSED)

<P><STRONG><a name="[172]"></a>port_int_enable</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text), UNUSED)

<P><STRONG><a name="[15d]"></a>port_cpsr_save</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
</UL>

<P><STRONG><a name="[15c]"></a>port_cpsr_restore</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
</UL>

<P><STRONG><a name="[15b]"></a>port_clz</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_clz
</UL>

<P><STRONG><a name="[11d]"></a>port_sched_start</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_sched_start
</UL>

<P><STRONG><a name="[117]"></a>port_context_switch</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_context_switch
</UL>

<P><STRONG><a name="[11b]"></a>port_irq_context_switch</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_irq_context_switch
</UL>

<P><STRONG><a name="[8]"></a>PendSV_Handler</STRONG> (Thumb, 0 bytes, Stack size unknown bytes, port_s.o(.text))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[ab]"></a>__aeabi_uldivmod</STRONG> (Thumb, 98 bytes, Stack size 40 bytes, uldiv.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[ac]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsr
<LI><a href="#[ad]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_llsl
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
<LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_init
<LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[af]"></a>__aeabi_memset</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[b0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_memset$wrapper
<LI><a href="#[ae]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr
</UL>

<P><STRONG><a name="[173]"></a>__aeabi_memset4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[174]"></a>__aeabi_memset8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[ae]"></a>__aeabi_memclr</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[e2]"></a>__aeabi_memclr4</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
<LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_common_init
</UL>

<P><STRONG><a name="[175]"></a>__aeabi_memclr8</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, memseta.o(.text), UNUSED)

<P><STRONG><a name="[b0]"></a>_memset$wrapper</STRONG> (Thumb, 18 bytes, Stack size 8 bytes, memseta.o(.text), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[af]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memset
</UL>

<P><STRONG><a name="[167]"></a>strncpy</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, strncpy.o(.text))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = strncpy
</UL>
<BR>[Called By]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
</UL>

<P><STRONG><a name="[ad]"></a>__aeabi_llsl</STRONG> (Thumb, 30 bytes, Stack size 0 bytes, llshl.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>

<P><STRONG><a name="[176]"></a>_ll_shift_l</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llshl.o(.text), UNUSED)

<P><STRONG><a name="[ac]"></a>__aeabi_llsr</STRONG> (Thumb, 32 bytes, Stack size 0 bytes, llushr.o(.text))
<BR><BR>[Called By]<UL><LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>

<P><STRONG><a name="[177]"></a>_ll_ushift_r</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, llushr.o(.text), UNUSED)

<P><STRONG><a name="[aa]"></a>__scatterload</STRONG> (Thumb, 28 bytes, Stack size 0 bytes, init.o(.text))
<BR><BR>[Calls]<UL><LI><a href="#[b1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__main_after_scatterload
</UL>
<BR>[Called By]<UL><LI><a href="#[a9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_main_scatterload
</UL>

<P><STRONG><a name="[178]"></a>__scatterload_rt2</STRONG> (Thumb, 0 bytes, Stack size 0 bytes, init.o(.text), UNUSED)

<P><STRONG><a name="[4]"></a>BusFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.BusFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;BusFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[7]"></a>DebugMon_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.DebugMon_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[e3]"></a>Error_Handler</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, main.o(i.Error_Handler))
<BR><BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART5_Init
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART4_Init
</UL>

<P><STRONG><a name="[b2]"></a>HAL_DMA_Abort</STRONG> (Thumb, 836 bytes, Stack size 40 bytes, stm32h7xx_hal_dma.o(i.HAL_DMA_Abort))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_DMA_Abort
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
<LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
</UL>

<P><STRONG><a name="[d6]"></a>HAL_DMA_Abort_IT</STRONG> (Thumb, 602 bytes, Stack size 40 bytes, stm32h7xx_hal_dma.o(i.HAL_DMA_Abort_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_DMA_Abort_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[d2]"></a>HAL_DMA_GetError</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, stm32h7xx_hal_dma.o(i.HAL_DMA_GetError))
<BR><BR>[Called By]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
</UL>

<P><STRONG><a name="[b4]"></a>HAL_DMA_Init</STRONG> (Thumb, 926 bytes, Stack size 40 bytes, stm32h7xx_hal_dma.o(i.HAL_DMA_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 52<LI>Call Chain = HAL_DMA_Init &rArr; DMA_CalcDMAMUXChannelBaseAndMask
</UL>
<BR>[Calls]<UL><LI><a href="#[b5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_CheckFifoParam
<LI><a href="#[b8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_CalcDMAMUXRequestGenBaseAndMask
<LI><a href="#[b7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_CalcDMAMUXChannelBaseAndMask
<LI><a href="#[b6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_CalcBaseAndBitshift
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
</UL>

<P><STRONG><a name="[b9]"></a>HAL_DMA_Start_IT</STRONG> (Thumb, 628 bytes, Stack size 40 bytes, stm32h7xx_hal_dma.o(i.HAL_DMA_Start_IT))
<BR><BR>[Stack]<UL><LI>Max Depth = 76<LI>Call Chain = HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[ba]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;DMA_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Start_Receive_DMA
</UL>

<P><STRONG><a name="[e4]"></a>HAL_GPIO_Init</STRONG> (Thumb, 506 bytes, Stack size 40 bytes, stm32h7xx_hal_gpio.o(i.HAL_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_GPIO_Init
</UL>
<BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
</UL>

<P><STRONG><a name="[ec]"></a>HAL_GPIO_WritePin</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, stm32h7xx_hal_gpio.o(i.HAL_GPIO_WritePin))
<BR><BR>[Called By]<UL><LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_thread_entry
</UL>

<P><STRONG><a name="[cd]"></a>HAL_GetREVID</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, stm32h7xx_hal.o(i.HAL_GetREVID))
<BR><BR>[Called By]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
</UL>

<P><STRONG><a name="[b3]"></a>HAL_GetTick</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32h7xx_hal.o(i.HAL_GetTick))
<BR><BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
<LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
<LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_PWREx_ConfigSupply
<LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL3_Config
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL2_Config
<LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
</UL>

<P><STRONG><a name="[f0]"></a>HAL_IncTick</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, stm32h7xx_hal.o(i.HAL_IncTick))
<BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[bb]"></a>HAL_Init</STRONG> (Thumb, 74 bytes, Stack size 8 bytes, stm32h7xx_hal.o(i.HAL_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_Init &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[bf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_MspInit
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
<LI><a href="#[bc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriorityGrouping
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[be]"></a>HAL_InitTick</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, stm32h7xx_hal.o(i.HAL_InitTick))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
</UL>
<BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[bf]"></a>HAL_MspInit</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, stm32h7xx_hal_msp.o(i.HAL_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_MspInit
</UL>
<BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[e5]"></a>HAL_NVIC_EnableIRQ</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, stm32h7xx_hal_cortex.o(i.HAL_NVIC_EnableIRQ))
<BR><BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
</UL>

<P><STRONG><a name="[c1]"></a>HAL_NVIC_SetPriority</STRONG> (Thumb, 60 bytes, Stack size 16 bytes, stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriority))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
<LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
</UL>

<P><STRONG><a name="[bc]"></a>HAL_NVIC_SetPriorityGrouping</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, stm32h7xx_hal_cortex.o(i.HAL_NVIC_SetPriorityGrouping))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_NVIC_SetPriorityGrouping
</UL>
<BR>[Called By]<UL><LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
</UL>

<P><STRONG><a name="[c3]"></a>HAL_PWREx_ConfigSupply</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, stm32h7xx_hal_pwr_ex.o(i.HAL_PWREx_ConfigSupply))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_PWREx_ConfigSupply
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[c4]"></a>HAL_RCCEx_GetD3PCLK1Freq</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetD3PCLK1Freq))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = HAL_RCCEx_GetD3PCLK1Freq &rArr; HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[f9]"></a>HAL_RCCEx_GetPLL2ClockFreq</STRONG> (Thumb, 296 bytes, Stack size 12 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL2ClockFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_RCCEx_GetPLL2ClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[fa]"></a>HAL_RCCEx_GetPLL3ClockFreq</STRONG> (Thumb, 296 bytes, Stack size 12 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_GetPLL3ClockFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_RCCEx_GetPLL3ClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[c6]"></a>HAL_RCCEx_PeriphCLKConfig</STRONG> (Thumb, 2472 bytes, Stack size 48 bytes, stm32h7xx_hal_rcc_ex.o(i.HAL_RCCEx_PeriphCLKConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[c8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL3_Config
<LI><a href="#[c7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;RCCEx_PLL2_Config
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
</UL>

<P><STRONG><a name="[c9]"></a>HAL_RCC_ClockConfig</STRONG> (Thumb, 580 bytes, Stack size 40 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_ClockConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
<LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[c5]"></a>HAL_RCC_GetHCLKFreq</STRONG> (Thumb, 52 bytes, Stack size 12 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_GetHCLKFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[bd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetSysClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
<LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetD3PCLK1Freq
</UL>

<P><STRONG><a name="[ca]"></a>HAL_RCC_GetPCLK1Freq</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK1Freq))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_RCC_GetPCLK1Freq &rArr; HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[cb]"></a>HAL_RCC_GetPCLK2Freq</STRONG> (Thumb, 26 bytes, Stack size 4 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_GetPCLK2Freq))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = HAL_RCC_GetPCLK2Freq &rArr; HAL_RCC_GetHCLKFreq &rArr; HAL_RCC_GetSysClockFreq
</UL>
<BR>[Calls]<UL><LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
</UL>

<P><STRONG><a name="[bd]"></a>HAL_RCC_GetSysClockFreq</STRONG> (Thumb, 278 bytes, Stack size 16 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_GetSysClockFreq))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = HAL_RCC_GetSysClockFreq
</UL>
<BR>[Called By]<UL><LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
<LI><a href="#[c5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetHCLKFreq
</UL>

<P><STRONG><a name="[cc]"></a>HAL_RCC_OscConfig</STRONG> (Thumb, 1410 bytes, Stack size 40 bytes, stm32h7xx_hal_rcc.o(i.HAL_RCC_OscConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = HAL_RCC_OscConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[cd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetREVID
<LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
</UL>

<P><STRONG><a name="[c0]"></a>HAL_SYSTICK_Config</STRONG> (Thumb, 38 bytes, Stack size 8 bytes, stm32h7xx_hal_cortex.o(i.HAL_SYSTICK_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = HAL_SYSTICK_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[c2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[be]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_InitTick
</UL>

<P><STRONG><a name="[ee]"></a>HAL_UARTEx_DisableFifoMode</STRONG> (Thumb, 64 bytes, Stack size 12 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_DisableFifoMode))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = HAL_UARTEx_DisableFifoMode
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART5_Init
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART4_Init
</UL>

<P><STRONG><a name="[d8]"></a>HAL_UARTEx_RxEventCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.HAL_UARTEx_RxEventCallback))
<BR><BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
<LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMARxHalfCplt
<LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAReceiveCplt
</UL>

<P><STRONG><a name="[dc]"></a>HAL_UARTEx_RxFifoFullCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_RxFifoFullCallback))
<BR><BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[ce]"></a>HAL_UARTEx_SetRxFifoThreshold</STRONG> (Thumb, 76 bytes, Stack size 16 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetRxFifoThreshold))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_UARTEx_SetRxFifoThreshold &rArr; UARTEx_SetNbDataToProcess
</UL>
<BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UARTEx_SetNbDataToProcess
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART5_Init
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART4_Init
</UL>

<P><STRONG><a name="[d0]"></a>HAL_UARTEx_SetTxFifoThreshold</STRONG> (Thumb, 76 bytes, Stack size 16 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_SetTxFifoThreshold))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = HAL_UARTEx_SetTxFifoThreshold &rArr; UARTEx_SetNbDataToProcess
</UL>
<BR>[Calls]<UL><LI><a href="#[cf]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UARTEx_SetNbDataToProcess
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART5_Init
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART4_Init
</UL>

<P><STRONG><a name="[db]"></a>HAL_UARTEx_TxFifoEmptyCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_TxFifoEmptyCallback))
<BR><BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[d9]"></a>HAL_UARTEx_WakeupCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_hal_uart_ex.o(i.HAL_UARTEx_WakeupCallback))
<BR><BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[d1]"></a>HAL_UART_DMAStop</STRONG> (Thumb, 146 bytes, Stack size 16 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_DMAStop))
<BR><BR>[Stack]<UL><LI>Max Depth = 56<LI>Call Chain = HAL_UART_DMAStop &rArr; HAL_DMA_Abort
</UL>
<BR>[Calls]<UL><LI><a href="#[d2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_GetError
<LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTxTransfer
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[d7]"></a>HAL_UART_ErrorCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_ErrorCallback))
<BR><BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
<LI><a href="#[99]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAAbortOnError
</UL>

<P><STRONG><a name="[d5]"></a>HAL_UART_IRQHandler</STRONG> (Thumb, 878 bytes, Stack size 24 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = HAL_UART_IRQHandler &rArr; HAL_DMA_Abort_IT
</UL>
<BR>[Calls]<UL><LI><a href="#[da]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_TxCpltCallback
<LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
<LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
<LI><a href="#[d9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_WakeupCallback
<LI><a href="#[db]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_TxFifoEmptyCallback
<LI><a href="#[dc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxFifoFullCallback
<LI><a href="#[d6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort_IT
<LI><a href="#[b2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Abort
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[3e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART5_IRQHandler
</UL>

<P><STRONG><a name="[dd]"></a>HAL_UART_Init</STRONG> (Thumb, 106 bytes, Stack size 8 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 336<LI>Call Chain = HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[de]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_MspInit
<LI><a href="#[df]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_SetConfig
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
<LI><a href="#[e0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_AdvFeatureConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART5_Init
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART4_Init
</UL>

<P><STRONG><a name="[de]"></a>HAL_UART_MspInit</STRONG> (Thumb, 326 bytes, Stack size 248 bytes, usart.o(i.HAL_UART_MspInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 328<LI>Call Chain = HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
<LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
<LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
<LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[e6]"></a>HAL_UART_Receive_DMA</STRONG> (Thumb, 66 bytes, Stack size 8 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_Receive_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 100<LI>Call Chain = HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[e7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_Start_Receive_DMA
</UL>
<BR>[Called By]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modubs_init
<LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[f7]"></a>HAL_UART_RxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_RxCpltCallback))
<BR><BR>[Called By]<UL><LI><a href="#[9a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAReceiveCplt
</UL>

<P><STRONG><a name="[f8]"></a>HAL_UART_RxHalfCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_RxHalfCpltCallback))
<BR><BR>[Called By]<UL><LI><a href="#[9b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMARxHalfCplt
</UL>

<P><STRONG><a name="[e8]"></a>HAL_UART_Transmit</STRONG> (Thumb, 176 bytes, Stack size 32 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_Transmit))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout &rArr; UART_EndRxTransfer
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[9d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;fputc
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_usart_send
</UL>

<P><STRONG><a name="[da]"></a>HAL_UART_TxCpltCallback</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.HAL_UART_TxCpltCallback))
<BR><BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>

<P><STRONG><a name="[ea]"></a>MX_DMA_Init</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, dma.o(i.MX_DMA_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = MX_DMA_Init &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[e5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_EnableIRQ
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[eb]"></a>MX_GPIO_Init</STRONG> (Thumb, 102 bytes, Stack size 40 bytes, gpio.o(i.MX_GPIO_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 80<LI>Call Chain = MX_GPIO_Init &rArr; HAL_GPIO_Init
</UL>
<BR>[Calls]<UL><LI><a href="#[e4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_Init
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ed]"></a>MX_UART4_Init</STRONG> (Thumb, 94 bytes, Stack size 8 bytes, usart.o(i.MX_UART4_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 344<LI>Call Chain = MX_UART4_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetTxFifoThreshold
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetRxFifoThreshold
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_DisableFifoMode
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[ef]"></a>MX_UART5_Init</STRONG> (Thumb, 94 bytes, Stack size 8 bytes, usart.o(i.MX_UART5_Init))
<BR><BR>[Stack]<UL><LI>Max Depth = 344<LI>Call Chain = MX_UART5_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
<LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetTxFifoThreshold
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetRxFifoThreshold
<LI><a href="#[ee]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_DisableFifoMode
<LI><a href="#[e3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;Error_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[3]"></a>MemManage_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.MemManage_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MemManage_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[1]"></a>NMI_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.NMI_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;NMI_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[6]"></a>SVC_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.SVC_Handler))
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[9]"></a>SysTick_Handler</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, main.o(i.SysTick_Handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 76 + Unknown Stack Size
<LI>Call Chain = SysTick_Handler &rArr; tos_tick_handler &rArr; tick_update &rArr; pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_tick_handler
<LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_is_running
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_irq_leave
<LI><a href="#[f2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_irq_enter
<LI><a href="#[f0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_IncTick
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[f5]"></a>SystemClock_Config</STRONG> (Thumb, 208 bytes, Stack size 128 bytes, main.o(i.SystemClock_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 200<LI>Call Chain = SystemClock_Config &rArr; HAL_RCC_ClockConfig &rArr; HAL_InitTick &rArr; HAL_NVIC_SetPriority
</UL>
<BR>[Calls]<UL><LI><a href="#[cc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_OscConfig
<LI><a href="#[c9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_ClockConfig
<LI><a href="#[c3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_PWREx_ConfigSupply
<LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[97]"></a>SystemInit</STRONG> (Thumb, 180 bytes, Stack size 20 bytes, system_stm32h7xx.o(i.SystemInit))
<BR><BR>[Stack]<UL><LI>Max Depth = 20<LI>Call Chain = SystemInit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(.text)
</UL>
<P><STRONG><a name="[3d]"></a>UART4_IRQHandler</STRONG> (Thumb, 182 bytes, Stack size 8 bytes, modbus.o(i.UART4_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 108 + Unknown Stack Size
<LI>Call Chain = UART4_IRQHandler &rArr; HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
<LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
<LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_post
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[3e]"></a>UART5_IRQHandler</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.UART5_IRQHandler))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = UART5_IRQHandler &rArr; HAL_UART_IRQHandler &rArr; HAL_DMA_Abort_IT
</UL>
<BR>[Calls]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[e0]"></a>UART_AdvFeatureConfig</STRONG> (Thumb, 200 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.UART_AdvFeatureConfig))
<BR><BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[e1]"></a>UART_CheckIdleState</STRONG> (Thumb, 170 bytes, Stack size 32 bytes, stm32h7xx_hal_uart.o(i.UART_CheckIdleState))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = UART_CheckIdleState &rArr; UART_WaitOnFlagUntilTimeout &rArr; UART_EndRxTransfer
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
</UL>
<BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[df]"></a>UART_SetConfig</STRONG> (Thumb, 876 bytes, Stack size 56 bytes, stm32h7xx_hal_uart.o(i.UART_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 96<LI>Call Chain = UART_SetConfig &rArr; __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[cb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK2Freq
<LI><a href="#[ca]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCC_GetPCLK1Freq
<LI><a href="#[fa]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPLL3ClockFreq
<LI><a href="#[f9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetPLL2ClockFreq
<LI><a href="#[c4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_GetD3PCLK1Freq
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[dd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Init
</UL>

<P><STRONG><a name="[e7]"></a>UART_Start_Receive_DMA</STRONG> (Thumb, 156 bytes, Stack size 16 bytes, stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA))
<BR><BR>[Stack]<UL><LI>Max Depth = 92<LI>Call Chain = UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>
<BR>[Called By]<UL><LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
</UL>

<P><STRONG><a name="[e9]"></a>UART_WaitOnFlagUntilTimeout</STRONG> (Thumb, 140 bytes, Stack size 32 bytes, stm32h7xx_hal_uart.o(i.UART_WaitOnFlagUntilTimeout))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = UART_WaitOnFlagUntilTimeout &rArr; UART_EndRxTransfer
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
<LI><a href="#[e1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_CheckIdleState
</UL>

<P><STRONG><a name="[5]"></a>UsageFault_Handler</STRONG> (Thumb, 2 bytes, Stack size 0 bytes, stm32h7xx_it.o(i.UsageFault_Handler))
<BR><BR>[Calls]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Called By]<UL><LI><a href="#[5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UsageFault_Handler
</UL>
<BR>[Address Reference Count : 1]<UL><LI> startup_stm32h750xx.o(RESET)
</UL>
<P><STRONG><a name="[fb]"></a>__0printf$8</STRONG> (Thumb, 22 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[179]"></a>__1printf$8</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8), UNUSED)

<P><STRONG><a name="[128]"></a>__2printf</STRONG> (Thumb, 0 bytes, Stack size 24 bytes, printf8.o(i.__0printf$8))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = __2printf
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[17a]"></a>__scatterload_copy</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_copy), UNUSED)

<P><STRONG><a name="[17b]"></a>__scatterload_null</STRONG> (Thumb, 2 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_null), UNUSED)

<P><STRONG><a name="[17c]"></a>__scatterload_zeroinit</STRONG> (Thumb, 14 bytes, Stack size unknown bytes, handlers.o(i.__scatterload_zeroinit), UNUSED)

<P><STRONG><a name="[103]"></a>agile_modbus_common_init</STRONG> (Thumb, 38 bytes, Stack size 24 bytes, agile_modbus.o(i.agile_modbus_common_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = agile_modbus_common_init
</UL>
<BR>[Calls]<UL><LI><a href="#[e2]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_memclr4
</UL>
<BR>[Called By]<UL><LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_rtu_init
</UL>

<P><STRONG><a name="[104]"></a>agile_modbus_deserialize_read_bits</STRONG> (Thumb, 146 bytes, Stack size 24 bytes, agile_modbus.o(i.agile_modbus_deserialize_read_bits))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = agile_modbus_deserialize_read_bits &rArr; agile_modbus_receive_msg_judge &rArr; agile_modbus_compute_data_length_after_meta
</UL>
<BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_receive_msg_judge
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_check_confirmation
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[106]"></a>agile_modbus_deserialize_read_registers</STRONG> (Thumb, 114 bytes, Stack size 24 bytes, agile_modbus.o(i.agile_modbus_deserialize_read_registers))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = agile_modbus_deserialize_read_registers &rArr; agile_modbus_receive_msg_judge &rArr; agile_modbus_compute_data_length_after_meta
</UL>
<BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_receive_msg_judge
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_check_confirmation
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[107]"></a>agile_modbus_deserialize_write_bits</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, agile_modbus.o(i.agile_modbus_deserialize_write_bits))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = agile_modbus_deserialize_write_bits &rArr; agile_modbus_receive_msg_judge &rArr; agile_modbus_compute_data_length_after_meta
</UL>
<BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_receive_msg_judge
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_check_confirmation
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[108]"></a>agile_modbus_deserialize_write_registers</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, agile_modbus.o(i.agile_modbus_deserialize_write_registers))
<BR><BR>[Stack]<UL><LI>Max Depth = 64<LI>Call Chain = agile_modbus_deserialize_write_registers &rArr; agile_modbus_receive_msg_judge &rArr; agile_modbus_compute_data_length_after_meta
</UL>
<BR>[Calls]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_receive_msg_judge
<LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_check_confirmation
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[10c]"></a>agile_modbus_rtu_init</STRONG> (Thumb, 24 bytes, Stack size 16 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = agile_modbus_rtu_init &rArr; agile_modbus_common_init
</UL>
<BR>[Calls]<UL><LI><a href="#[103]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_common_init
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[134]"></a>agile_modbus_serialize_read_bits</STRONG> (Thumb, 66 bytes, Stack size 24 bytes, agile_modbus.o(i.agile_modbus_serialize_read_bits))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = agile_modbus_serialize_read_bits
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[130]"></a>agile_modbus_serialize_read_registers</STRONG> (Thumb, 64 bytes, Stack size 24 bytes, agile_modbus.o(i.agile_modbus_serialize_read_registers))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = agile_modbus_serialize_read_registers
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[135]"></a>agile_modbus_serialize_write_bits</STRONG> (Thumb, 196 bytes, Stack size 40 bytes, agile_modbus.o(i.agile_modbus_serialize_write_bits))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = agile_modbus_serialize_write_bits
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[133]"></a>agile_modbus_serialize_write_registers</STRONG> (Thumb, 122 bytes, Stack size 32 bytes, agile_modbus.o(i.agile_modbus_serialize_write_registers))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = agile_modbus_serialize_write_registers
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[12f]"></a>agile_modbus_set_slave</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, agile_modbus.o(i.agile_modbus_set_slave))
<BR><BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[116]"></a>cpu_context_switch</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, tos_cpu.o(i.cpu_context_switch))
<BR><BR>[Calls]<UL><LI><a href="#[117]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_context_switch
</UL>
<BR>[Called By]<UL><LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
</UL>

<P><STRONG><a name="[118]"></a>cpu_init</STRONG> (Thumb, 30 bytes, Stack size 8 bytes, tos_cpu.o(i.cpu_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = cpu_init &rArr; __aeabi_uldivmod
</UL>
<BR>[Calls]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_systick_init
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_init
</UL>

<P><STRONG><a name="[11a]"></a>cpu_irq_context_switch</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, tos_cpu.o(i.cpu_irq_context_switch))
<BR><BR>[Calls]<UL><LI><a href="#[11b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_irq_context_switch
</UL>
<BR>[Called By]<UL><LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_irq_leave
</UL>

<P><STRONG><a name="[11c]"></a>cpu_sched_start</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, tos_cpu.o(i.cpu_sched_start))
<BR><BR>[Calls]<UL><LI><a href="#[11d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_sched_start
</UL>
<BR>[Called By]<UL><LI><a href="#[12b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_start
</UL>

<P><STRONG><a name="[119]"></a>cpu_systick_init</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, tos_cpu.o(i.cpu_systick_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = cpu_systick_init &rArr; port_systick_config
</UL>
<BR>[Calls]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_systick_priority_set
<LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_systick_config
</UL>
<BR>[Called By]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_init
</UL>

<P><STRONG><a name="[166]"></a>cpu_task_stk_init</STRONG> (Thumb, 160 bytes, Stack size 36 bytes, tos_cpu.o(i.cpu_task_stk_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = cpu_task_stk_init
</UL>
<BR>[Called By]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
</UL>

<P><STRONG><a name="[9d]"></a>fputc</STRONG> (Thumb, 20 bytes, Stack size 16 bytes, main.o(i.fputc))
<BR><BR>[Stack]<UL><LI>Max Depth = 88<LI>Call Chain = fputc &rArr; HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout &rArr; UART_EndRxTransfer
</UL>
<BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
</UL>
<BR>[Address Reference Count : 1]<UL><LI> printf8.o(i.__0printf$8)
</UL>
<P><STRONG><a name="[121]"></a>knl_idle_init</STRONG> (Thumb, 38 bytes, Stack size 24 bytes, tos_sys.o(i.knl_idle_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 100 + Unknown Stack Size
<LI>Call Chain = knl_idle_init &rArr; tos_task_create &rArr; cpu_task_stk_init
</UL>
<BR>[Calls]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
</UL>
<BR>[Called By]<UL><LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_init
</UL>

<P><STRONG><a name="[14b]"></a>knl_is_idle</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, tos_sys.o(i.knl_is_idle))
<BR><BR>[Called By]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_remove
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
</UL>

<P><STRONG><a name="[163]"></a>knl_is_inirq</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, tos_sys.o(i.knl_is_inirq))
<BR><BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_pend
<LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
<LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_yield
<LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_destroy
</UL>

<P><STRONG><a name="[164]"></a>knl_is_sched_locked</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, tos_sys.o(i.knl_is_sched_locked))
<BR><BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_pend
<LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_destroy
</UL>

<P><STRONG><a name="[169]"></a>knl_is_self</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, tos_sys.o(i.knl_is_self))
<BR><BR>[Called By]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
<LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_destroy
</UL>

<P><STRONG><a name="[123]"></a>knl_sched</STRONG> (Thumb, 64 bytes, Stack size 8 bytes, tos_sys.o(i.knl_sched))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = knl_sched
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[116]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_context_switch
<LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_highest_ready_task_get
</UL>
<BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_pend
<LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
<LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_yield
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
<LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_sched_unlock
<LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sem_do_post
</UL>

<P><STRONG><a name="[9f]"></a>led_thread_entry</STRONG> (Thumb, 48 bytes, Stack size 0 bytes, main.o(i.led_thread_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 60 + Unknown Stack Size
<LI>Call Chain = led_thread_entry &rArr; tos_task_delay &rArr; tos_task_yield &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[ec]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GPIO_WritePin
</UL>
<BR>[Address Reference Count : 1]<UL><LI> main.o(i.main)
</UL>
<P><STRONG><a name="[96]"></a>main</STRONG> (Thumb, 72 bytes, Stack size 24 bytes, main.o(i.main))
<BR><BR>[Stack]<UL><LI>Max Depth = 368 + Unknown Stack Size
<LI>Call Chain = main &rArr; MX_UART5_Init &rArr; HAL_UART_Init &rArr; HAL_UART_MspInit &rArr; HAL_RCCEx_PeriphCLKConfig &rArr; RCCEx_PLL3_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[12b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_start
<LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_init
<LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modubs_init
<LI><a href="#[ef]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART5_Init
<LI><a href="#[ed]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_UART4_Init
<LI><a href="#[eb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_GPIO_Init
<LI><a href="#[ea]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;MX_DMA_Init
<LI><a href="#[bb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_Init
<LI><a href="#[f5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SystemClock_Config
<LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
</UL>
<BR>[Address Reference Count : 1]<UL><LI> entry9a.o(.ARM.Collect$$$$0000000B)
</UL>
<P><STRONG><a name="[12c]"></a>mmheap_init_with_pool</STRONG> (Thumb, 22 bytes, Stack size 16 bytes, tos_mmheap.o(i.mmheap_init_with_pool))
<BR><BR>[Stack]<UL><LI>Max Depth = 88 + Unknown Stack Size
<LI>Call Chain = mmheap_init_with_pool &rArr; tos_mmheap_pool_add &rArr; blk_insert &rArr; mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_pool_add
<LI><a href="#[12d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mmheap_ctl_init
</UL>
<BR>[Called By]<UL><LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_init
</UL>

<P><STRONG><a name="[12a]"></a>modubs_init</STRONG> (Thumb, 72 bytes, Stack size 24 bytes, modbus.o(i.modubs_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 124 + Unknown Stack Size
<LI>Call Chain = modubs_init &rArr; HAL_UART_Receive_DMA &rArr; UART_Start_Receive_DMA &rArr; HAL_DMA_Start_IT &rArr; DMA_SetConfig
</UL>
<BR>[Calls]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[e6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Receive_DMA
<LI><a href="#[137]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_create
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[13a]"></a>mutex_release</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, tos_mutex.o(i.mutex_release))
<BR><BR>[Stack]<UL><LI>Max Depth = 76 + Unknown Stack Size
<LI>Call Chain = mutex_release &rArr; mutex_old_owner_release &rArr; tos_task_prio_change &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_wakeup_all
<LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mutex_old_owner_release
</UL>
<BR>[Called By]<UL><LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
</UL>

<P><STRONG><a name="[16a]"></a>pend_highest_pending_prio_get</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, tos_pend.o(i.pend_highest_pending_prio_get))
<BR><BR>[Called By]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
</UL>

<P><STRONG><a name="[14d]"></a>pend_is_nopending</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, tos_pend.o(i.pend_is_nopending))
<BR><BR>[Called By]<UL><LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sem_do_post
</UL>

<P><STRONG><a name="[13c]"></a>pend_list_adjust</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, tos_pend.o(i.pend_list_adjust))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = pend_list_adjust &rArr; pend_list_add
</UL>
<BR>[Calls]<UL><LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_list_add
</UL>
<BR>[Called By]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
</UL>

<P><STRONG><a name="[142]"></a>pend_list_remove</STRONG> (Thumb, 26 bytes, Stack size 0 bytes, tos_pend.o(i.pend_list_remove))
<BR><BR>[Called By]<UL><LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_wakeup
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
</UL>

<P><STRONG><a name="[162]"></a>pend_object_init</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, tos_pend.o(i.pend_object_init), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[161]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_create_max
</UL>

<P><STRONG><a name="[165]"></a>pend_state2errno</STRONG> (Thumb, 44 bytes, Stack size 0 bytes, tos_pend.o(i.pend_state2errno))
<BR><BR>[Called By]<UL><LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_pend
</UL>

<P><STRONG><a name="[13e]"></a>pend_task_block</STRONG> (Thumb, 56 bytes, Stack size 24 bytes, tos_pend.o(i.pend_task_block))
<BR><BR>[Stack]<UL><LI>Max Depth = 64 + Unknown Stack Size
<LI>Call Chain = pend_task_block &rArr; tick_list_add &rArr; tick_task_place
</UL>
<BR>[Calls]<UL><LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_list_add
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_remove
<LI><a href="#[13d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_list_add
</UL>
<BR>[Called By]<UL><LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_pend
</UL>

<P><STRONG><a name="[141]"></a>pend_task_wakeup</STRONG> (Thumb, 56 bytes, Stack size 8 bytes, tos_pend.o(i.pend_task_wakeup))
<BR><BR>[Stack]<UL><LI>Max Depth = 36 + Unknown Stack Size
<LI>Call Chain = pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_list_remove
<LI><a href="#[144]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add
<LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_list_remove
</UL>
<BR>[Called By]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_wakeup_all
<LI><a href="#[146]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_wakeup_one
<LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_update
</UL>

<P><STRONG><a name="[145]"></a>pend_wakeup</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, tos_pend.o(i.pend_wakeup))
<BR><BR>[Stack]<UL><LI>Max Depth = 52 + Unknown Stack Size
<LI>Call Chain = pend_wakeup &rArr; pend_wakeup_all &rArr; pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[13b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_wakeup_all
<LI><a href="#[146]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_wakeup_one
</UL>
<BR>[Called By]<UL><LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sem_do_post
</UL>

<P><STRONG><a name="[13b]"></a>pend_wakeup_all</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, tos_pend.o(i.pend_wakeup_all))
<BR><BR>[Stack]<UL><LI>Max Depth = 52 + Unknown Stack Size
<LI>Call Chain = pend_wakeup_all &rArr; pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_wakeup
</UL>
<BR>[Called By]<UL><LI><a href="#[145]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_wakeup
<LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mutex_release
</UL>

<P><STRONG><a name="[146]"></a>pend_wakeup_one</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, tos_pend.o(i.pend_wakeup_one))
<BR><BR>[Stack]<UL><LI>Max Depth = 36 + Unknown Stack Size
<LI>Call Chain = pend_wakeup_one &rArr; pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_wakeup
</UL>
<BR>[Called By]<UL><LI><a href="#[145]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_wakeup
</UL>

<P><STRONG><a name="[11f]"></a>port_systick_config</STRONG> (Thumb, 34 bytes, Stack size 8 bytes, port_c.o(i.port_systick_config))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = port_systick_config
</UL>
<BR>[Calls]<UL><LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_systick_init
</UL>

<P><STRONG><a name="[11e]"></a>port_systick_priority_set</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, port_c.o(i.port_systick_priority_set))
<BR><BR>[Calls]<UL><LI><a href="#[147]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__NVIC_SetPriority
</UL>
<BR>[Called By]<UL><LI><a href="#[119]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_systick_init
</UL>

<P><STRONG><a name="[144]"></a>readyqueue_add</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, tos_sched.o(i.readyqueue_add))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add_tail
<LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add_head
</UL>
<BR>[Called By]<UL><LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_wakeup
</UL>

<P><STRONG><a name="[149]"></a>readyqueue_add_head</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, tos_sched.o(i.readyqueue_add_head))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = readyqueue_add_head &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[14a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_prio_mark
</UL>
<BR>[Called By]<UL><LI><a href="#[144]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add
<LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
</UL>

<P><STRONG><a name="[148]"></a>readyqueue_add_tail</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, tos_sched.o(i.readyqueue_add_tail))
<BR><BR>[Stack]<UL><LI>Max Depth = 28<LI>Call Chain = readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[14a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_prio_mark
</UL>
<BR>[Called By]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[144]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add
<LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
<LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_yield
</UL>

<P><STRONG><a name="[125]"></a>readyqueue_highest_ready_task_get</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, tos_sched.o(i.readyqueue_highest_ready_task_get))
<BR><BR>[Called By]<UL><LI><a href="#[12b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_start
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_irq_leave
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
</UL>

<P><STRONG><a name="[15e]"></a>readyqueue_init</STRONG> (Thumb, 48 bytes, Stack size 8 bytes, tos_sched.o(i.readyqueue_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = readyqueue_init
</UL>
<BR>[Called By]<UL><LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_init
</UL>

<P><STRONG><a name="[13f]"></a>readyqueue_remove</STRONG> (Thumb, 102 bytes, Stack size 16 bytes, tos_sched.o(i.readyqueue_remove))
<BR><BR>[Stack]<UL><LI>Max Depth = 16 + Unknown Stack Size
<LI>Call Chain = readyqueue_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_clz
<LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_idle
</UL>
<BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_block
<LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
<LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_yield
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
</UL>

<P><STRONG><a name="[15f]"></a>soft_timer_init</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, tos_timer.o(i.soft_timer_init))
<BR><BR>[Called By]<UL><LI><a href="#[129]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_init
</UL>

<P><STRONG><a name="[14e]"></a>soft_timer_update</STRONG> (Thumb, 118 bytes, Stack size 24 bytes, tos_timer.o(i.soft_timer_update))
<BR><BR>[Stack]<UL><LI>Max Depth = 48 + Unknown Stack Size
<LI>Call Chain = soft_timer_update &rArr; timer_place
</UL>
<BR>[Calls]<UL><LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_sched_lock
<LI><a href="#[150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_takeoff
<LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_place
<LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_sched_unlock
</UL>
<BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_tick_handler
</UL>

<P><STRONG><a name="[120]"></a>task_free_all</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, tos_task.o(i.task_free_all))
<BR><BR>[Stack]<UL><LI>Max Depth = 96 + Unknown Stack Size
<LI>Call Chain = task_free_all &rArr; task_free &rArr; tos_mmheap_free &rArr; blk_merge_next &rArr; blk_remove &rArr; mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_free
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_idle_entry
</UL>

<P><STRONG><a name="[140]"></a>tick_list_add</STRONG> (Thumb, 22 bytes, Stack size 8 bytes, tos_tick.o(i.tick_list_add))
<BR><BR>[Stack]<UL><LI>Max Depth = 40 + Unknown Stack Size
<LI>Call Chain = tick_list_add &rArr; tick_task_place
</UL>
<BR>[Calls]<UL><LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_task_place
</UL>
<BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_block
</UL>

<P><STRONG><a name="[143]"></a>tick_list_remove</STRONG> (Thumb, 112 bytes, Stack size 24 bytes, tos_tick.o(i.tick_list_remove))
<BR><BR>[Stack]<UL><LI>Max Depth = 24 + Unknown Stack Size
<LI>Call Chain = tick_list_remove
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[159]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_list_empty
</UL>
<BR>[Called By]<UL><LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_wakeup
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
</UL>

<P><STRONG><a name="[15a]"></a>tick_update</STRONG> (Thumb, 114 bytes, Stack size 24 bytes, tos_tick.o(i.tick_update))
<BR><BR>[Stack]<UL><LI>Max Depth = 60 + Unknown Stack Size
<LI>Call Chain = tick_update &rArr; pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[141]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_wakeup
</UL>
<BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_tick_handler
</UL>

<P><STRONG><a name="[fe]"></a>tos_cpu_clz</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, tos_cpu.o(i.tos_cpu_clz))
<BR><BR>[Calls]<UL><LI><a href="#[15b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_clz
</UL>
<BR>[Called By]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fls
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_remove
</UL>

<P><STRONG><a name="[126]"></a>tos_cpu_cpsr_restore</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, tos_cpu.o(i.tos_cpu_cpsr_restore))
<BR><BR>[Calls]<UL><LI><a href="#[15c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_cpsr_restore
</UL>
<BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_irq_leave
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_pend
<LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_sched_lock
<LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_list_remove
<LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
<LI><a href="#[150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_takeoff
<LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_place
<LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_update
<LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_task_place
<LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_yield
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
<LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_free_all
<LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_sched_unlock
<LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sem_do_post
</UL>

<P><STRONG><a name="[124]"></a>tos_cpu_cpsr_save</STRONG> (Thumb, 4 bytes, Stack size 0 bytes, tos_cpu.o(i.tos_cpu_cpsr_save))
<BR><BR>[Calls]<UL><LI><a href="#[15d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_cpsr_save
</UL>
<BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[f4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_irq_leave
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_pend
<LI><a href="#[14f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_sched_lock
<LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_list_remove
<LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
<LI><a href="#[150]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_takeoff
<LI><a href="#[152]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;timer_place
<LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_update
<LI><a href="#[158]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_task_place
<LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_yield
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
<LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_free_all
<LI><a href="#[151]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_sched_unlock
<LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sem_do_post
</UL>

<P><STRONG><a name="[129]"></a>tos_knl_init</STRONG> (Thumb, 42 bytes, Stack size 8 bytes, tos_sys.o(i.tos_knl_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 108 + Unknown Stack Size
<LI>Call Chain = tos_knl_init &rArr; knl_idle_init &rArr; tos_task_create &rArr; cpu_task_stk_init
</UL>
<BR>[Calls]<UL><LI><a href="#[118]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_init
<LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mmheap_init_with_pool
<LI><a href="#[15f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_timer_init
<LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_idle_init
<LI><a href="#[15e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_init
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[f2]"></a>tos_knl_irq_enter</STRONG> (Thumb, 22 bytes, Stack size 0 bytes, tos_sys.o(i.tos_knl_irq_enter))
<BR><BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[f4]"></a>tos_knl_irq_leave</STRONG> (Thumb, 70 bytes, Stack size 8 bytes, tos_sys.o(i.tos_knl_irq_leave))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = tos_knl_irq_leave
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[11a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_irq_context_switch
<LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_highest_ready_task_get
</UL>
<BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[f1]"></a>tos_knl_is_running</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, tos_sys.o(i.tos_knl_is_running))
<BR><BR>[Called By]<UL><LI><a href="#[f3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_tick_handler
<LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>

<P><STRONG><a name="[14f]"></a>tos_knl_sched_lock</STRONG> (Thumb, 60 bytes, Stack size 8 bytes, tos_sys.o(i.tos_knl_sched_lock))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = tos_knl_sched_lock
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
</UL>
<BR>[Called By]<UL><LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_timer_update
</UL>

<P><STRONG><a name="[151]"></a>tos_knl_sched_unlock</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, tos_sys.o(i.tos_knl_sched_unlock))
<BR><BR>[Stack]<UL><LI>Max Depth = 16 + Unknown Stack Size
<LI>Call Chain = tos_knl_sched_unlock &rArr; knl_sched
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
</UL>
<BR>[Called By]<UL><LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_timer_update
</UL>

<P><STRONG><a name="[12b]"></a>tos_knl_start</STRONG> (Thumb, 40 bytes, Stack size 8 bytes, tos_sys.o(i.tos_knl_start))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = tos_knl_start
</UL>
<BR>[Calls]<UL><LI><a href="#[11c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_sched_start
<LI><a href="#[125]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_highest_ready_task_get
</UL>
<BR>[Called By]<UL><LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
</UL>

<P><STRONG><a name="[157]"></a>tos_mmheap_free</STRONG> (Thumb, 56 bytes, Stack size 16 bytes, tos_mmheap.o(i.tos_mmheap_free))
<BR><BR>[Stack]<UL><LI>Max Depth = 72 + Unknown Stack Size
<LI>Call Chain = tos_mmheap_free &rArr; blk_merge_next &rArr; blk_remove &rArr; mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_remove
<LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_merge_next
<LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_mark_as_free
<LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_insert
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_absorb
</UL>
<BR>[Called By]<UL><LI><a href="#[156]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_free
</UL>

<P><STRONG><a name="[12e]"></a>tos_mmheap_pool_add</STRONG> (Thumb, 128 bytes, Stack size 16 bytes, tos_mmheap.o(i.tos_mmheap_pool_add))
<BR><BR>[Stack]<UL><LI>Max Depth = 72 + Unknown Stack Size
<LI>Call Chain = tos_mmheap_pool_add &rArr; blk_insert &rArr; mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[160]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mmheap_pool_is_exist
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_link_next
<LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_insert
</UL>
<BR>[Called By]<UL><LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mmheap_init_with_pool
</UL>

<P><STRONG><a name="[137]"></a>tos_sem_create</STRONG> (Thumb, 8 bytes, Stack size 0 bytes, tos_sem.o(i.tos_sem_create))
<BR><BR>[Called By]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modubs_init
</UL>

<P><STRONG><a name="[161]"></a>tos_sem_create_max</STRONG> (Thumb, 44 bytes, Stack size 8 bytes, tos_sem.o(i.tos_sem_create_max), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[162]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_object_init
</UL>

<P><STRONG><a name="[136]"></a>tos_sem_pend</STRONG> (Thumb, 148 bytes, Stack size 24 bytes, tos_sem.o(i.tos_sem_pend))
<BR><BR>[Stack]<UL><LI>Max Depth = 88 + Unknown Stack Size
<LI>Call Chain = tos_sem_pend &rArr; pend_task_block &rArr; tick_list_add &rArr; tick_task_place
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_block
<LI><a href="#[165]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_state2errno
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[164]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_sched_locked
<LI><a href="#[163]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_inirq
</UL>
<BR>[Called By]<UL><LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_usart_read
</UL>

<P><STRONG><a name="[f6]"></a>tos_sem_post</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, tos_sem.o(i.tos_sem_post))
<BR><BR>[Stack]<UL><LI>Max Depth = 68 + Unknown Stack Size
<LI>Call Chain = tos_sem_post &rArr; sem_do_post &rArr; pend_wakeup &rArr; pend_wakeup_all &rArr; pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[14c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;sem_do_post
</UL>
<BR>[Called By]<UL><LI><a href="#[3d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART4_IRQHandler
</UL>

<P><STRONG><a name="[122]"></a>tos_task_create</STRONG> (Thumb, 212 bytes, Stack size 40 bytes, tos_task.o(i.tos_task_create))
<BR><BR>[Stack]<UL><LI>Max Depth = 76 + Unknown Stack Size
<LI>Call Chain = tos_task_create &rArr; cpu_task_stk_init
</UL>
<BR>[Calls]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_is_running
<LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[166]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;cpu_task_stk_init
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[163]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_inirq
<LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_reset
<LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_idle
<LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add_tail
<LI><a href="#[167]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;strncpy
</UL>
<BR>[Called By]<UL><LI><a href="#[12a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modubs_init
<LI><a href="#[96]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;main
<LI><a href="#[121]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_idle_init
</UL>

<P><STRONG><a name="[127]"></a>tos_task_delay</STRONG> (Thumb, 92 bytes, Stack size 16 bytes, tos_task.o(i.tos_task_delay))
<BR><BR>[Stack]<UL><LI>Max Depth = 60 + Unknown Stack Size
<LI>Call Chain = tos_task_delay &rArr; tos_task_yield &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[164]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_sched_locked
<LI><a href="#[163]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_inirq
<LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_list_add
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_remove
<LI><a href="#[168]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_yield
</UL>
<BR>[Called By]<UL><LI><a href="#[9f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;led_thread_entry
<LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[155]"></a>tos_task_destroy</STRONG> (Thumb, 82 bytes, Stack size 8 bytes, tos_task.o(i.tos_task_destroy))
<BR><BR>[Stack]<UL><LI>Max Depth = 100 + Unknown Stack Size
<LI>Call Chain = tos_task_destroy &rArr; task_do_destroy &rArr; mutex_release &rArr; mutex_old_owner_release &rArr; tos_task_prio_change &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[164]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_sched_locked
<LI><a href="#[163]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_inirq
<LI><a href="#[169]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_self
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
</UL>
<BR>[Called By]<UL><LI><a href="#[a1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_exit
</UL>

<P><STRONG><a name="[139]"></a>tos_task_prio_change</STRONG> (Thumb, 198 bytes, Stack size 24 bytes, tos_task.o(i.tos_task_prio_change))
<BR><BR>[Stack]<UL><LI>Max Depth = 52 + Unknown Stack Size
<LI>Call Chain = tos_task_prio_change &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[163]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_inirq
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_remove
<LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_list_adjust
<LI><a href="#[16a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_highest_pending_prio_get
<LI><a href="#[169]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_self
<LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add_tail
<LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add_head
</UL>
<BR>[Called By]<UL><LI><a href="#[138]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mutex_old_owner_release
</UL>

<P><STRONG><a name="[168]"></a>tos_task_yield</STRONG> (Thumb, 46 bytes, Stack size 16 bytes, tos_task.o(i.tos_task_yield))
<BR><BR>[Stack]<UL><LI>Max Depth = 44 + Unknown Stack Size
<LI>Call Chain = tos_task_yield &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[163]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_inirq
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_remove
<LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add_tail
</UL>
<BR>[Called By]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
</UL>

<P><STRONG><a name="[f3]"></a>tos_tick_handler</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, tos_tick.o(i.tos_tick_handler))
<BR><BR>[Stack]<UL><LI>Max Depth = 68 + Unknown Stack Size
<LI>Call Chain = tos_tick_handler &rArr; tick_update &rArr; pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[f1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_knl_is_running
<LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_timer_update
<LI><a href="#[15a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_update
</UL>
<BR>[Called By]<UL><LI><a href="#[9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;SysTick_Handler
</UL>
<P>
<H3>
Local Symbols
</H3>
<P><STRONG><a name="[c2]"></a>__NVIC_SetPriority</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, stm32h7xx_hal_cortex.o(i.__NVIC_SetPriority))
<BR><BR>[Called By]<UL><LI><a href="#[c1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_NVIC_SetPriority
<LI><a href="#[c0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_SYSTICK_Config
</UL>

<P><STRONG><a name="[99]"></a>UART_DMAAbortOnError</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, stm32h7xx_hal_uart.o(i.UART_DMAAbortOnError))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART_DMAAbortOnError
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32h7xx_hal_uart.o(i.HAL_UART_IRQHandler)
</UL>
<P><STRONG><a name="[9c]"></a>UART_DMAError</STRONG> (Thumb, 78 bytes, Stack size 16 bytes, stm32h7xx_hal_uart.o(i.UART_DMAError))
<BR><BR>[Stack]<UL><LI>Max Depth = 24<LI>Call Chain = UART_DMAError &rArr; UART_EndRxTransfer
</UL>
<BR>[Calls]<UL><LI><a href="#[d7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_ErrorCallback
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTxTransfer
<LI><a href="#[d4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndRxTransfer
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA)
</UL>
<P><STRONG><a name="[9a]"></a>UART_DMAReceiveCplt</STRONG> (Thumb, 130 bytes, Stack size 8 bytes, stm32h7xx_hal_uart.o(i.UART_DMAReceiveCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART_DMAReceiveCplt
</UL>
<BR>[Calls]<UL><LI><a href="#[f7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_RxCpltCallback
<LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA)
</UL>
<P><STRONG><a name="[9b]"></a>UART_DMARxHalfCplt</STRONG> (Thumb, 32 bytes, Stack size 8 bytes, stm32h7xx_hal_uart.o(i.UART_DMARxHalfCplt))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART_DMARxHalfCplt
</UL>
<BR>[Calls]<UL><LI><a href="#[f8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_RxHalfCpltCallback
<LI><a href="#[d8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_RxEventCallback
</UL>
<BR>[Address Reference Count : 1]<UL><LI> stm32h7xx_hal_uart.o(i.UART_Start_Receive_DMA)
</UL>
<P><STRONG><a name="[d4]"></a>UART_EndRxTransfer</STRONG> (Thumb, 78 bytes, Stack size 8 bytes, stm32h7xx_hal_uart.o(i.UART_EndRxTransfer))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = UART_EndRxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[d5]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_IRQHandler
<LI><a href="#[e9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_WaitOnFlagUntilTimeout
<LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
</UL>

<P><STRONG><a name="[d3]"></a>UART_EndTxTransfer</STRONG> (Thumb, 46 bytes, Stack size 0 bytes, stm32h7xx_hal_uart.o(i.UART_EndTxTransfer))
<BR><BR>[Calls]<UL><LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTxTransfer
</UL>
<BR>[Called By]<UL><LI><a href="#[d1]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_DMAStop
<LI><a href="#[d3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_EndTxTransfer
<LI><a href="#[9c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;UART_DMAError
</UL>

<P><STRONG><a name="[cf]"></a>UARTEx_SetNbDataToProcess</STRONG> (Thumb, 62 bytes, Stack size 12 bytes, stm32h7xx_hal_uart_ex.o(i.UARTEx_SetNbDataToProcess))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = UARTEx_SetNbDataToProcess
</UL>
<BR>[Called By]<UL><LI><a href="#[d0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetTxFifoThreshold
<LI><a href="#[ce]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UARTEx_SetRxFifoThreshold
</UL>

<P><STRONG><a name="[c7]"></a>RCCEx_PLL2_Config</STRONG> (Thumb, 284 bytes, Stack size 32 bytes, stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL2_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = RCCEx_PLL2_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
</UL>

<P><STRONG><a name="[c8]"></a>RCCEx_PLL3_Config</STRONG> (Thumb, 284 bytes, Stack size 32 bytes, stm32h7xx_hal_rcc_ex.o(i.RCCEx_PLL3_Config))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = RCCEx_PLL3_Config
</UL>
<BR>[Calls]<UL><LI><a href="#[b3]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_GetTick
</UL>
<BR>[Called By]<UL><LI><a href="#[c6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_RCCEx_PeriphCLKConfig
</UL>

<P><STRONG><a name="[b6]"></a>DMA_CalcBaseAndBitshift</STRONG> (Thumb, 168 bytes, Stack size 0 bytes, stm32h7xx_hal_dma.o(i.DMA_CalcBaseAndBitshift))
<BR><BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
</UL>

<P><STRONG><a name="[b7]"></a>DMA_CalcDMAMUXChannelBaseAndMask</STRONG> (Thumb, 138 bytes, Stack size 12 bytes, stm32h7xx_hal_dma.o(i.DMA_CalcDMAMUXChannelBaseAndMask))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = DMA_CalcDMAMUXChannelBaseAndMask
</UL>
<BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
</UL>

<P><STRONG><a name="[b8]"></a>DMA_CalcDMAMUXRequestGenBaseAndMask</STRONG> (Thumb, 104 bytes, Stack size 8 bytes, stm32h7xx_hal_dma.o(i.DMA_CalcDMAMUXRequestGenBaseAndMask))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = DMA_CalcDMAMUXRequestGenBaseAndMask
</UL>
<BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
</UL>

<P><STRONG><a name="[b5]"></a>DMA_CheckFifoParam</STRONG> (Thumb, 84 bytes, Stack size 8 bytes, stm32h7xx_hal_dma.o(i.DMA_CheckFifoParam))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = DMA_CheckFifoParam
</UL>
<BR>[Called By]<UL><LI><a href="#[b4]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Init
</UL>

<P><STRONG><a name="[ba]"></a>DMA_SetConfig</STRONG> (Thumb, 518 bytes, Stack size 36 bytes, stm32h7xx_hal_dma.o(i.DMA_SetConfig))
<BR><BR>[Stack]<UL><LI>Max Depth = 36<LI>Call Chain = DMA_SetConfig
</UL>
<BR>[Called By]<UL><LI><a href="#[b9]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_DMA_Start_IT
</UL>

<P><STRONG><a name="[147]"></a>__NVIC_SetPriority</STRONG> (Thumb, 34 bytes, Stack size 0 bytes, port_c.o(i.__NVIC_SetPriority))
<BR><BR>[Called By]<UL><LI><a href="#[11e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_systick_priority_set
<LI><a href="#[11f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;port_systick_config
</UL>

<P><STRONG><a name="[fd]"></a>__fls</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, tos_mmheap.o(i.__fls))
<BR><BR>[Stack]<UL><LI>Max Depth = 8 + Unknown Stack Size
<LI>Call Chain = __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[fe]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_clz
</UL>
<BR>[Called By]<UL><LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mapping_insert
</UL>

<P><STRONG><a name="[10d]"></a>blk_absorb</STRONG> (Thumb, 28 bytes, Stack size 8 bytes, tos_mmheap.o(i.blk_absorb))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = blk_absorb &rArr; blk_link_next
</UL>
<BR>[Calls]<UL><LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_link_next
</UL>
<BR>[Called By]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_free
<LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_merge_next
</UL>

<P><STRONG><a name="[10f]"></a>blk_insert</STRONG> (Thumb, 84 bytes, Stack size 32 bytes, tos_mmheap.o(i.blk_insert))
<BR><BR>[Stack]<UL><LI>Max Depth = 56 + Unknown Stack Size
<LI>Call Chain = blk_insert &rArr; mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mapping_insert
</UL>
<BR>[Called By]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_free
<LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_pool_add
</UL>

<P><STRONG><a name="[10e]"></a>blk_link_next</STRONG> (Thumb, 12 bytes, Stack size 8 bytes, tos_mmheap.o(i.blk_link_next))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = blk_link_next
</UL>
<BR>[Calls]<UL><LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_next
</UL>
<BR>[Called By]<UL><LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_pool_add
<LI><a href="#[112]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_mark_as_free
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_absorb
</UL>

<P><STRONG><a name="[112]"></a>blk_mark_as_free</STRONG> (Thumb, 26 bytes, Stack size 8 bytes, tos_mmheap.o(i.blk_mark_as_free))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = blk_mark_as_free &rArr; blk_link_next
</UL>
<BR>[Calls]<UL><LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_link_next
</UL>
<BR>[Called By]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_free
</UL>

<P><STRONG><a name="[113]"></a>blk_merge_next</STRONG> (Thumb, 36 bytes, Stack size 16 bytes, tos_mmheap.o(i.blk_merge_next))
<BR><BR>[Stack]<UL><LI>Max Depth = 56 + Unknown Stack Size
<LI>Call Chain = blk_merge_next &rArr; blk_remove &rArr; mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_remove
<LI><a href="#[111]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_next
<LI><a href="#[10d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_absorb
</UL>
<BR>[Called By]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_free
</UL>

<P><STRONG><a name="[111]"></a>blk_next</STRONG> (Thumb, 16 bytes, Stack size 0 bytes, tos_mmheap.o(i.blk_next))
<BR><BR>[Called By]<UL><LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_merge_next
<LI><a href="#[10e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_link_next
</UL>

<P><STRONG><a name="[114]"></a>blk_remove</STRONG> (Thumb, 30 bytes, Stack size 16 bytes, tos_mmheap.o(i.blk_remove))
<BR><BR>[Stack]<UL><LI>Max Depth = 40 + Unknown Stack Size
<LI>Call Chain = blk_remove &rArr; mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[115]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;remove_free_block
<LI><a href="#[110]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mapping_insert
</UL>
<BR>[Called By]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_free
<LI><a href="#[113]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_merge_next
</UL>

<P><STRONG><a name="[110]"></a>mapping_insert</STRONG> (Thumb, 44 bytes, Stack size 16 bytes, tos_mmheap.o(i.mapping_insert))
<BR><BR>[Stack]<UL><LI>Max Depth = 24 + Unknown Stack Size
<LI>Call Chain = mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[fd]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__fls
</UL>
<BR>[Called By]<UL><LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_remove
<LI><a href="#[10f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_insert
</UL>

<P><STRONG><a name="[12d]"></a>mmheap_ctl_init</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, tos_mmheap.o(i.mmheap_ctl_init))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = mmheap_ctl_init
</UL>
<BR>[Called By]<UL><LI><a href="#[12c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mmheap_init_with_pool
</UL>

<P><STRONG><a name="[160]"></a>mmheap_pool_is_exist</STRONG> (Thumb, 36 bytes, Stack size 8 bytes, tos_mmheap.o(i.mmheap_pool_is_exist))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = mmheap_pool_is_exist
</UL>
<BR>[Called By]<UL><LI><a href="#[12e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_pool_add
</UL>

<P><STRONG><a name="[115]"></a>remove_free_block</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, tos_mmheap.o(i.remove_free_block))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = remove_free_block
</UL>
<BR>[Called By]<UL><LI><a href="#[114]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;blk_remove
</UL>

<P><STRONG><a name="[138]"></a>mutex_old_owner_release</STRONG> (Thumb, 62 bytes, Stack size 16 bytes, tos_mutex.o(i.mutex_old_owner_release))
<BR><BR>[Stack]<UL><LI>Max Depth = 68 + Unknown Stack Size
<LI>Call Chain = mutex_old_owner_release &rArr; tos_task_prio_change &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[139]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_prio_change
</UL>
<BR>[Called By]<UL><LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mutex_release
</UL>

<P><STRONG><a name="[13d]"></a>pend_list_add</STRONG> (Thumb, 62 bytes, Stack size 8 bytes, tos_pend.o(i.pend_list_add))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = pend_list_add
</UL>
<BR>[Called By]<UL><LI><a href="#[13e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_task_block
<LI><a href="#[13c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_list_adjust
</UL>

<P><STRONG><a name="[14a]"></a>readyqueue_prio_mark</STRONG> (Thumb, 42 bytes, Stack size 12 bytes, tos_sched.o(i.readyqueue_prio_mark))
<BR><BR>[Stack]<UL><LI>Max Depth = 12<LI>Call Chain = readyqueue_prio_mark
</UL>
<BR>[Called By]<UL><LI><a href="#[148]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add_tail
<LI><a href="#[149]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_add_head
</UL>

<P><STRONG><a name="[14c]"></a>sem_do_post</STRONG> (Thumb, 102 bytes, Stack size 16 bytes, tos_sem.o(i.sem_do_post))
<BR><BR>[Stack]<UL><LI>Max Depth = 68 + Unknown Stack Size
<LI>Call Chain = sem_do_post &rArr; pend_wakeup &rArr; pend_wakeup_all &rArr; pend_task_wakeup &rArr; readyqueue_add &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[14d]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_is_nopending
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[145]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_wakeup
</UL>
<BR>[Called By]<UL><LI><a href="#[f6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_post
</UL>

<P><STRONG><a name="[9e]"></a>knl_idle_entry</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, tos_sys.o(i.knl_idle_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 96 + Unknown Stack Size
 + In Cycle
<LI>Call Chain = knl_idle_entry &rArr;  knl_idle_entry (Cycle)
</UL>
<BR>[Calls]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_free_all
<LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_idle_entry
</UL>
<BR>[Called By]<UL><LI><a href="#[9e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_idle_entry
</UL>
<BR>[Address Reference Count : 1]<UL><LI> tos_sys.o(i.knl_idle_init)
</UL>
<P><STRONG><a name="[153]"></a>task_do_destroy</STRONG> (Thumb, 130 bytes, Stack size 16 bytes, tos_task.o(i.task_do_destroy))
<BR><BR>[Stack]<UL><LI>Max Depth = 92 + Unknown Stack Size
<LI>Call Chain = task_do_destroy &rArr; mutex_release &rArr; mutex_old_owner_release &rArr; tos_task_prio_change &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
<LI><a href="#[123]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_sched
<LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_list_remove
<LI><a href="#[13f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;readyqueue_remove
<LI><a href="#[142]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;pend_list_remove
<LI><a href="#[13a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;mutex_release
<LI><a href="#[154]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_reset
<LI><a href="#[14b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;knl_is_idle
</UL>
<BR>[Called By]<UL><LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_destroy
</UL>

<P><STRONG><a name="[a1]"></a>task_exit</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, tos_task.o(i.task_exit))
<BR><BR>[Stack]<UL><LI>Max Depth = 100 + Unknown Stack Size
<LI>Call Chain = task_exit &rArr; tos_task_destroy &rArr; task_do_destroy &rArr; mutex_release &rArr; mutex_old_owner_release &rArr; tos_task_prio_change &rArr; readyqueue_add_tail &rArr; readyqueue_prio_mark
</UL>
<BR>[Calls]<UL><LI><a href="#[155]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_destroy
</UL>
<BR>[Address Reference Count : 1]<UL><LI> tos_task.o(i.tos_task_create)
</UL>
<P><STRONG><a name="[156]"></a>task_free</STRONG> (Thumb, 20 bytes, Stack size 8 bytes, tos_task.o(i.task_free))
<BR><BR>[Stack]<UL><LI>Max Depth = 80 + Unknown Stack Size
<LI>Call Chain = task_free &rArr; tos_mmheap_free &rArr; blk_merge_next &rArr; blk_remove &rArr; mapping_insert &rArr; __fls
</UL>
<BR>[Calls]<UL><LI><a href="#[157]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_mmheap_free
</UL>
<BR>[Called By]<UL><LI><a href="#[120]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_free_all
</UL>

<P><STRONG><a name="[154]"></a>task_reset</STRONG> (Thumb, 58 bytes, Stack size 0 bytes, tos_task.o(i.task_reset))
<BR><BR>[Called By]<UL><LI><a href="#[122]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_create
<LI><a href="#[153]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;task_do_destroy
</UL>

<P><STRONG><a name="[158]"></a>tick_task_place</STRONG> (Thumb, 150 bytes, Stack size 32 bytes, tos_tick.o(i.tick_task_place))
<BR><BR>[Stack]<UL><LI>Max Depth = 32 + Unknown Stack Size
<LI>Call Chain = tick_task_place
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
</UL>
<BR>[Called By]<UL><LI><a href="#[140]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_list_add
</UL>

<P><STRONG><a name="[159]"></a>tos_list_empty</STRONG> (Thumb, 14 bytes, Stack size 0 bytes, tos_tick.o(i.tos_list_empty))
<BR><BR>[Called By]<UL><LI><a href="#[143]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tick_list_remove
</UL>

<P><STRONG><a name="[152]"></a>timer_place</STRONG> (Thumb, 98 bytes, Stack size 24 bytes, tos_timer.o(i.timer_place))
<BR><BR>[Stack]<UL><LI>Max Depth = 24 + Unknown Stack Size
<LI>Call Chain = timer_place
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
</UL>
<BR>[Called By]<UL><LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_timer_update
</UL>

<P><STRONG><a name="[150]"></a>timer_takeoff</STRONG> (Thumb, 68 bytes, Stack size 16 bytes, tos_timer.o(i.timer_takeoff))
<BR><BR>[Stack]<UL><LI>Max Depth = 16 + Unknown Stack Size
<LI>Call Chain = timer_takeoff
</UL>
<BR>[Calls]<UL><LI><a href="#[124]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_save
<LI><a href="#[126]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_cpu_cpsr_restore
</UL>
<BR>[Called By]<UL><LI><a href="#[14e]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;soft_timer_update
</UL>

<P><STRONG><a name="[a0]"></a>modbus_thread_entry</STRONG> (Thumb, 414 bytes, Stack size 8 bytes, modbus.o(i.modbus_thread_entry))
<BR><BR>[Stack]<UL><LI>Max Depth = 104 + Unknown Stack Size
<LI>Call Chain = modbus_thread_entry &rArr; modbus_usart_read &rArr; tos_sem_pend &rArr; pend_task_block &rArr; tick_list_add &rArr; tick_task_place
</UL>
<BR>[Calls]<UL><LI><a href="#[127]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_task_delay
<LI><a href="#[128]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__2printf
<LI><a href="#[12f]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_set_slave
<LI><a href="#[133]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_serialize_write_registers
<LI><a href="#[135]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_serialize_write_bits
<LI><a href="#[130]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_serialize_read_registers
<LI><a href="#[134]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_serialize_read_bits
<LI><a href="#[10c]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_rtu_init
<LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_write_registers
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_write_bits
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_read_registers
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_read_bits
<LI><a href="#[131]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_usart_send
<LI><a href="#[132]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_usart_read
</UL>
<BR>[Address Reference Count : 1]<UL><LI> modbus.o(i.modubs_init)
</UL>
<P><STRONG><a name="[132]"></a>modbus_usart_read</STRONG> (Thumb, 24 bytes, Stack size 8 bytes, modbus.o(i.modbus_usart_read))
<BR><BR>[Stack]<UL><LI>Max Depth = 96 + Unknown Stack Size
<LI>Call Chain = modbus_usart_read &rArr; tos_sem_pend &rArr; pend_task_block &rArr; tick_list_add &rArr; tick_task_place
</UL>
<BR>[Calls]<UL><LI><a href="#[136]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;tos_sem_pend
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[131]"></a>modbus_usart_send</STRONG> (Thumb, 24 bytes, Stack size 0 bytes, modbus.o(i.modbus_usart_send))
<BR><BR>[Stack]<UL><LI>Max Depth = 72<LI>Call Chain = modbus_usart_send &rArr; HAL_UART_Transmit &rArr; UART_WaitOnFlagUntilTimeout &rArr; UART_EndRxTransfer
</UL>
<BR>[Calls]<UL><LI><a href="#[e8]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;HAL_UART_Transmit
</UL>
<BR>[Called By]<UL><LI><a href="#[a0]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;modbus_thread_entry
</UL>

<P><STRONG><a name="[101]"></a>agile_modbus_check_confirmation</STRONG> (Thumb, 228 bytes, Stack size 32 bytes, agile_modbus.o(i.agile_modbus_check_confirmation))
<BR><BR>[Stack]<UL><LI>Max Depth = 40<LI>Call Chain = agile_modbus_check_confirmation &rArr; agile_modbus_compute_response_length_from_request
</UL>
<BR>[Calls]<UL><LI><a href="#[102]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_compute_response_length_from_request
</UL>
<BR>[Called By]<UL><LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_write_registers
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_write_bits
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_read_registers
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_read_bits
</UL>

<P><STRONG><a name="[10a]"></a>agile_modbus_compute_data_length_after_meta</STRONG> (Thumb, 70 bytes, Stack size 16 bytes, agile_modbus.o(i.agile_modbus_compute_data_length_after_meta))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = agile_modbus_compute_data_length_after_meta
</UL>
<BR>[Called By]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_receive_msg_judge
</UL>

<P><STRONG><a name="[109]"></a>agile_modbus_compute_meta_length_after_function</STRONG> (Thumb, 108 bytes, Stack size 8 bytes, agile_modbus.o(i.agile_modbus_compute_meta_length_after_function))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = agile_modbus_compute_meta_length_after_function
</UL>
<BR>[Called By]<UL><LI><a href="#[105]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_receive_msg_judge
</UL>

<P><STRONG><a name="[102]"></a>agile_modbus_compute_response_length_from_request</STRONG> (Thumb, 108 bytes, Stack size 8 bytes, agile_modbus.o(i.agile_modbus_compute_response_length_from_request))
<BR><BR>[Stack]<UL><LI>Max Depth = 8<LI>Call Chain = agile_modbus_compute_response_length_from_request
</UL>
<BR>[Called By]<UL><LI><a href="#[101]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_check_confirmation
</UL>

<P><STRONG><a name="[105]"></a>agile_modbus_receive_msg_judge</STRONG> (Thumb, 80 bytes, Stack size 32 bytes, agile_modbus.o(i.agile_modbus_receive_msg_judge))
<BR><BR>[Stack]<UL><LI>Max Depth = 48<LI>Call Chain = agile_modbus_receive_msg_judge &rArr; agile_modbus_compute_data_length_after_meta
</UL>
<BR>[Calls]<UL><LI><a href="#[109]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_compute_meta_length_after_function
<LI><a href="#[10a]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_compute_data_length_after_meta
</UL>
<BR>[Called By]<UL><LI><a href="#[108]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_write_registers
<LI><a href="#[107]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_write_bits
<LI><a href="#[106]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_read_registers
<LI><a href="#[104]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_deserialize_read_bits
</UL>

<P><STRONG><a name="[a3]"></a>agile_modbus_rtu_build_request_basis</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_build_request_basis))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = agile_modbus_rtu_build_request_basis
</UL>
<BR>[Address Reference Count : 1]<UL><LI> agile_modbus_rtu.o(.constdata)
</UL>
<P><STRONG><a name="[a4]"></a>agile_modbus_rtu_build_response_basis</STRONG> (Thumb, 12 bytes, Stack size 0 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_build_response_basis))
<BR>[Address Reference Count : 1]<UL><LI> agile_modbus_rtu.o(.constdata)
</UL>
<P><STRONG><a name="[a7]"></a>agile_modbus_rtu_check_integrity</STRONG> (Thumb, 38 bytes, Stack size 16 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_check_integrity))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = agile_modbus_rtu_check_integrity &rArr; agile_modbus_rtu_crc16
</UL>
<BR>[Calls]<UL><LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_rtu_crc16
</UL>
<BR>[Address Reference Count : 1]<UL><LI> agile_modbus_rtu.o(.constdata)
</UL>
<P><STRONG><a name="[10b]"></a>agile_modbus_rtu_crc16</STRONG> (Thumb, 40 bytes, Stack size 16 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_crc16))
<BR><BR>[Stack]<UL><LI>Max Depth = 16<LI>Call Chain = agile_modbus_rtu_crc16
</UL>
<BR>[Called By]<UL><LI><a href="#[a6]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_rtu_send_msg_pre
<LI><a href="#[a7]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_rtu_check_integrity
</UL>

<P><STRONG><a name="[a8]"></a>agile_modbus_rtu_pre_check_confirmation</STRONG> (Thumb, 20 bytes, Stack size 0 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_pre_check_confirmation))
<BR>[Address Reference Count : 1]<UL><LI> agile_modbus_rtu.o(.constdata)
</UL>
<P><STRONG><a name="[a5]"></a>agile_modbus_rtu_prepare_response_tid</STRONG> (Thumb, 10 bytes, Stack size 0 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_prepare_response_tid))
<BR>[Address Reference Count : 1]<UL><LI> agile_modbus_rtu.o(.constdata)
</UL>
<P><STRONG><a name="[a6]"></a>agile_modbus_rtu_send_msg_pre</STRONG> (Thumb, 26 bytes, Stack size 16 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_send_msg_pre))
<BR><BR>[Stack]<UL><LI>Max Depth = 32<LI>Call Chain = agile_modbus_rtu_send_msg_pre &rArr; agile_modbus_rtu_crc16
</UL>
<BR>[Calls]<UL><LI><a href="#[10b]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;agile_modbus_rtu_crc16
</UL>
<BR>[Address Reference Count : 1]<UL><LI> agile_modbus_rtu.o(.constdata)
</UL>
<P><STRONG><a name="[a2]"></a>agile_modbus_rtu_set_slave</STRONG> (Thumb, 6 bytes, Stack size 0 bytes, agile_modbus_rtu.o(i.agile_modbus_rtu_set_slave))
<BR>[Address Reference Count : 1]<UL><LI> agile_modbus_rtu.o(.constdata)
</UL>
<P><STRONG><a name="[fc]"></a>_printf_core</STRONG> (Thumb, 996 bytes, Stack size 104 bytes, printf8.o(i._printf_core), UNUSED)
<BR><BR>[Calls]<UL><LI><a href="#[ff]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_pre_padding
<LI><a href="#[100]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_post_padding
<LI><a href="#[ab]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__aeabi_uldivmod
</UL>
<BR>[Called By]<UL><LI><a href="#[fb]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;__0printf$8
</UL>

<P><STRONG><a name="[100]"></a>_printf_post_padding</STRONG> (Thumb, 36 bytes, Stack size 24 bytes, printf8.o(i._printf_post_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>

<P><STRONG><a name="[ff]"></a>_printf_pre_padding</STRONG> (Thumb, 46 bytes, Stack size 24 bytes, printf8.o(i._printf_pre_padding), UNUSED)
<BR><BR>[Called By]<UL><LI><a href="#[fc]">&gt;&gt;</a>&nbsp;&nbsp;&nbsp;_printf_core
</UL>
<P>
<H3>
Undefined Global Symbols
</H3><HR></body></html>
